IBM

 Designation Verification Engineer - ISTL Job Description Verification expertise (chip level and/or block level) - From spec to tape-out for complex designs.  Test plan/testbench infrastructure/test cases/coverage ownership and execution for multiple projects.  Desired Profile Hands on experience in System Verilog/Specman/Vera or C++.  Knowledge of CPU architecture (inclusive of but not limited to cores/io's/memories and related logic).  System level awareness - integration/ initialization/ bring-up /DFT is a huge plus.  Excellent planning/ motivation/ team playing and communication skills to excel in a multi-site working environment.  Enthusiasm to learn new functional domains and methodologies  0 to 8 years of desired experience required   Required  Bachelor's Degree  English: Fluent  Experience 0 - 5 Years Industry Type IT-Software/ Software Services Role Testing Engnr Functional Area QA & Testing Education UG - Any Graduate PG - Any PG Course Location Bengaluru/Bangalore Keywords System Verilog/ Specman, Vera, C++, integration, initialization,, Test plan, testbench infrastructure, test cases Contact HR IBM India Pvt Limited Website https://jobs3.netmedia1.com/cp/search.jsp?trac=hp_in&jobati
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